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Description of the IOS board

This board is the connection between the rest of the system and the machine with the MPU, where there is the micriprocessor set. It uses the following devices:

  • 5 INPUT/OUTPUT PORTS (2), (3), (4), (7) & (8) 1852.
  • 1 PROGRAMMABLE DIVIDER (5) CDP1863
  • 2 DARLINGTON & TRANSISTOR ARRAYS (l) 75492 & (9) 3086.
  • 1 SHIFT REGISTER (6) 4021.

The devices of the PORTS I/O, DIVIDER & SHIFT REGISTER, receives or send infor�mation to the CPU through the data bus BUS0 to BUS7 when the corresponding signal 101-107 is valid and TPB is also valid.

The ports (3) & (4) are used as input ports. All the connections from the push buttons and machine contacts reach them. At the port (4) the contacts from the playfield are connected in array, Cl to C6 by one side and 01 to 08 by the other side. At the port (3) the cabinet push buttons are connected as well as the one for the resetting of the accumulators, which, is located in this board.

The inputs coming from the micro switch, corresponding to the coin rejectors 1M, 2M & 3M, have a delay network composed of a resistor and a capacitor, whose work is to prevent the pulses from being too short (the ones produced when shaking the door) reach the input port (4).

The ports (7) & (8) are used as output ports. To them are connected the boards that control the lights, relays, etc.

The port (2), connected as output port, sends to the display the information that controls the anodes of the multiplexed digits through the darlington drivers of the device (l) and the transistors TR1 to TR6. Prom the colector of such transistors the information which controls the columns of the input array C1 to C6 is derived by means of resistors.

The PROGRAMMABLE DIVIDER (5), divides the oscillation coming from the CPU through the line TPB by a programmable value from the CPU. At the output no-minated OUT it is found the square wave which is applied to the gain control-led amplifier composed of the device (9) and the associated components. The gain of this amplifier is controlled by the output DOT of the port (2) and by the potentiometer. A power transistor BD244 supplies the necessary amplifica-tion to attack the loudspeaker.

The capacitor connected to the pin 6 of the device (9) is powered by an internal transistor of this device when D07 of the device (2) is high. When making D07 low, such capacitor is slowly discharged through a shunt resistor. The voltage or such capacitor is applied through another internal transistor of the device (9) and the potentiometer of the amplifier. When loosing power the volume diminishes obtaining the fadding effect of the sound.

The SHIFT REGISTER (6), recives the information in paralel coming from the CPU by BUS0-BUS7 when I02 is valid and transmits in serial to the display boards syncronously by means of the clock CKD.

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